3.17.3 AVR Options

These options are defined for AVR implementations:

-mmcu=mcu

Specify Atmel AVR instruction set architectures (ISA) or MCU type.

For a complete list of mcu values that are supported by avr-gcc, see the compiler output when called with the --help=target command line option. The default for this option is avr2.

avr-gcc supports the following AVR devices and ISAs:

avr1

This ISA is implemented by the minimal AVR core and supported for assembler only.
mcu = at90s1200, attiny10, attiny11, attiny12, attiny15, attiny28.

avr2

“Classic” devices with up to 8 KiB of program memory.
mcu = at90s2313, attiny26, at90c8534, ...

avr25

“Classic” devices with up to 8 KiB of program memory and with the MOVW instruction.
mcu = attiny2313, attiny261, attiny24, ...

avr3

“Classic” devices with 16 KiB up to 64 KiB of program memory.
mcu = at43usb355, at76c711.

avr31

“Classic” devices with 128 KiB of program memory.
mcu = atmega103, at43usb320.

avr35

“Classic” devices with 16 KiB up to 64 KiB of program memory and with the MOVW instruction.
mcu = at90usb162, atmega8u2, attiny167, ...

avr4

“Enhanced” devices with up to 8 KiB of program memory.
mcu = atmega8, atmega88, at90pwm81, ...

avr5

“Enhanced” devices with 16 KiB up to 64 KiB of program memory.
mcu = atmega16, atmega6490, at90can64, ...

avr51

“Enhanced” devices with 128 KiB of program memory.
mcu = atmega128, at90can128, at90usb1287, ...

avr6

“Enhanced” devices with 3-byte PC, i.e. with at least 256 KiB of program memory.
mcu = atmega2560, atmega2561.

-maccumulate-args

Accumulate outgoing function arguments and acquire/release the needed stack space for outgoing function arguments once in function prologue/epilogue. Without this option, outgoing arguments are pushed before calling a function and popped afterwards.

Popping the arguments after the function call can be expensive on AVR so that accumulating the stack space might lead to smaller executables because arguments need not to be removed from the stack after such a function call.

This option can lead to reduced code size for functions that perform several calls to functions that get their arguments on the stack like calls to printf-like functions.

-mbranch-cost=cost

Set the branch costs for conditional branch instructions to cost. Reasonable values for cost are small, non-negative integers. The default branch cost is 0.

-mcall-prologues

Functions prologues/epilogues expanded as call to appropriate subroutines. Code size will be smaller.

-mint8

Assume int to be 8-bit integer. This affects the sizes of all types: a char will be 1 byte, an int will be 1 byte, a long will be 2 bytes and long long will be 4 bytes. Please note that this option does not comply to the C standards, but it will provide you with smaller code size.

-mno-interrupts

Generated code is not compatible with hardware interrupts. Code size will be smaller.

-mrelax

Try to replace CALL resp. JMP instruction by the shorter RCALL resp. RJMP instruction if applicable. Setting -mrelax just adds the --relax option to the linker command line when the linker is called.

Jump relaxing is performed by the linker because jump offsets are not known before code is located. Therefore, the assembler code generated by the compiler will be the same, but the instructions in the executable may differ from instructions in the assembler code.

-mshort-calls

Use RCALL/RJMP instructions even on devices with 16 KiB or more of program memory, i.e. on devices that have the CALL and JMP instructions. See also the -mrelax command line option.

-mstrict-X

Use address register X in a way proposed by the hardware. This means that X will only be used in indirect, post-increment or pre-decrement addressing.

Without this option, the X register may be used in the same way as Y or Z which then is emulated by additional instructions. For example, loading a value with X+const addressing with a small non-negative const < 64 to a register Rn will be performed as

          adiw r26, const   ; X += const
          ld   Rn, X        ; Rn = *X
          sbiw r26, const   ; X -= const
     

-mtiny-stack

Only use the lower 8 bits of the stack pointer and assume that the high byte of SP is always zero.

3.17.3.1 EIND and Devices with more than 128 Ki Bytes of Flash

Pointers in the implementation are 16 bits wide. The address of a function or label is represented as word address so that indirect jumps and calls can target any code address in the range of 64 Ki words.

In order to facilitate indirect jump on devices with more than 128 Ki bytes of program memory space, there is a special function register called EIND that serves as most significant part of the target address when EICALL or EIJMP instructions are used.

Indirect jumps and calls on these devices are handled as follows by the compiler and are subject to some limitations:

• The compiler never sets EIND.
• The startup code from libgcc never sets EIND. Notice that startup code is a blend of code from libgcc and avr-libc. For the impact of avr-libc on EIND, see the avr-libc user manual.
• The compiler uses EIND implicitely in EICALL/EIJMP instructions or might read EIND directly in order to emulate an indirect call/jump by means of a RET instruction.
• The compiler assumes that EIND never changes during the startup code or during the application. In particular, EIND is not saved/restored in function or interrupt service routine prologue/epilogue.
• It is legitimate for user-specific startup code to set up EIND early, for example by means of initialization code located in section .init3. Such code runs prior to general startup code that initializes RAM and calls constructors.
• For indirect calls to functions and computed goto, the linker will generate stubs. Stubs are jump pads sometimes also called trampolines. Thus, the indirect call/jump will jump to such a stub. The stub contains a direct jump to the desired address.
• Stubs will be generated automatically by the linker if the following two conditions are met:
  • The address of a label is taken by means of the gs modifier (short for generate stubs) like so:

                   LDI r24, lo8(gs(func))
                   LDI r25, hi8(gs(func))
              

  • The final location of that label is in a code segment outside the segment where the stubs are located.
• The compiler will emit such gs modifiers for code labels in the following situations:
  • Taking address of a function or code label.
  • Computed goto.
  • If prologue-save function is used, see -mcall-prologues command-line option.
  • Switch/case dispatch tables. If you do not want such dispatch tables you can specify the -fno-jump-tables command-line option.
  • C and C++ constructors/destructors called during startup/shutdown.
  • If the tools hit a gs() modifier explained above.
• The default linker script is arranged for code with EIND = 0. If code is supposed to work for a setup with EIND != 0, a custom linker script has to be used in order to place the sections whose name start with .trampolines into the segment where EIND points to.
• Jumping to non-symbolic addresses like so is not supported:

            int main (void)
            {
                /* Call function at word address 0x2 */
                return ((int(*)(void)) 0x2)();
            }
       

  Instead, a stub has to be set up, i.e. the function has to be called through a symbol (func_4 in the example):

            int main (void)
            {
                extern int func_4 (void);
            
                /* Call function at byte address 0x4 */
                return func_4();
            }
       

  and the application be linked with -Wl,--defsym,func_4=0x4. Alternatively, func_4 can be defined in the linker script.

3.17.3.2 AVR Built-in Macros

avr-gcc defines several built-in macros so that the user code can test for presence of absence of features. Almost any of the following built-in macros are deduced from device capabilities and thus triggered by the -mmcu= command-line option.

For even more AVR-specific built-in macros see AVR Named Address Spaces and AVR Built-in Functions.

__AVR_Device__

Setting -mmcu=device defines this built-in macro which reflects the device's name. For example, -mmcu=atmega8 will define the built-in macro __AVR_ATmega8__, -mmcu=attiny261a defines __AVR_ATtiny261A__, etc.

The built-in macros' names follow the scheme __AVR_Device__ where Device is the device name as from the AVR user manual. The difference between Device in the built-in macro and device in -mmcu=device is that the latter is always lowercase.

__AVR_HAVE_RAMPZ__

__AVR_HAVE_ELPM__

The device has the RAMPZ special function register and thus the ELPM instruction.

__AVR_HAVE_ELPMX__

The device has the ELPM Rn,Z and ELPM Rn,Z+ instructions.

__AVR_HAVE_MOVW__

The device has the MOVW instruction to perform 16-bit register-register moves.

__AVR_HAVE_LPMX__

The device has the LPM Rn,Z and LPM Rn,Z+ instructions.

__AVR_HAVE_MUL__

The device has a hardware multiplier.

__AVR_HAVE_JMP_CALL__

The device has the JMP and CALL instructions. This is the case for devices with at least 16 KiB of program memory and if -mshort-calls is not set.

__AVR_HAVE_EIJMP_EICALL__

__AVR_3_BYTE_PC__

The device has the EIJMP and EICALL instructions. This is the case for devices with at least 256 KiB of program memory. This also means that the program counter (PC) is 3 bytes wide.

__AVR_2_BYTE_PC__

The program counter (PC) is 2 bytes wide. This is the case for devices with up to 128 KiB of program memory.

__AVR_HAVE_8BIT_SP__

__AVR_HAVE_16BIT_SP__

The stack pointer (SP) is respectively 8 or 16 bits wide. The definition of these macros is affected by -mtiny-stack.

__NO_INTERRUPTS__

This macro reflects the -mno-interrupts command line option.

__AVR_ERRATA_SKIP__

__AVR_ERRATA_SKIP_JMP_CALL__

Some AVR devices (AT90S8515, ATmega103) must not skip 32-bit instructions because of a hardware erratum. Skip instructions are SBRS, SBRC, SBIS, SBIC and CPSE. The second macro is only defined if __AVR_HAVE_JMP_CALL__ is also set.

__AVR_SFR_OFFSET__=offset

Instructions that can address I/O special function registers directly like IN, OUT, SBI, etc. may use a different address as if addressed by an instruction to access RAM like LD or STS. This offset depends on the device architecture and has to be subtracted from the RAM address in order to get the respective I/O address.